Staff/Principal DFT Engineer

  • Job Reference: 1352915712-2
  • Date Posted: 10 June 2024
  • Recruiter: ARM
  • Location: Austin, Texas
  • Salary: On Application
  • Sector: Care in the community
  • Job Type: Permanent

Job Description

Job Overview:

Arm's Solutions group DFT team implements DFT for SOC for client, datacenter, automotive, and IOT line of business using the latest DFT and process technologies. We closely collaborate with Arm's partners and internal RTL, Verification, Physical Implementation, and Test engineering teams throughout the life cycle of a project, from an early investigation stage all the way through tape-out and silicon test/characterization on ATE!

  • Architect, implement, and validate innovative DFT techniques on SOCs and sub-systems.
  • Insert DFT logic into SoC as well as sub-system level and validate all DFT features using industry standard simulation tools.
  • Work closely with multi-functional teams to support DFT RTL level insertion, synthesis and scan insertion, place-and-route, and static-timing-analysis and timing closure.
  • Participate in ATE targeted test patterns, validation and silicon- debug
  • Work closely Test and product engineering teams on silicon characterization and validation.
Required Skills and Experience :
  • This role is for a Staff / Principal DFT Engineer with 8+ years of experience in Design for Test
  • Core DFT skills considered crucial for this position should include some of the following: Siemens DFT tools, Streaming Scan Network (SSN), Scan compression and insertion, Memory BIST and repair scheme implementation, Logic BIST, JTAG/IJTAG, at-speed test, ATPG, fault simulation, back-annotated gate level verification, silicon debug, memory and scan diagnostics.
  • Experience coding Verilog RTL, TCL and/or Perl
  • Experience with Cadence, and/or Synopsys DFT and simulation tools
"Nice To Have" Skills and Experience :
  • Familiarity with SoC style architectures including multi-clock domain and low power design practices.
  • Previous experience leading a team of DFT engineers
  • Familiarity with Arm IP like the following: Cortex CPUs, Mali GPUs, AMBA protocols, CoreLink interconnects, CoreSight debug
  • Background in high design, implementation and DFT timing constraints is a big plus
  • Experience in datacenter chips is plus
  • Experience with 2.5D and 3D test
In Return:

At Arm, we are proud to have a set of behaviors that reflect our culture and guide our decisions, defining how we work together to defy ordinary and shape outstanding! These behaviors are assessed as part of the recruitment process:

  • Partner and customer focus
  • Teamwork and communication
  • Creativity and innovation
  • Team and personal development
  • Impact and influence
  • Deliver on your promises